• 专利附录
  • 专利说明
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    • 专利摘要:
    A method of manufacturing a high density sub-lithographic feature is disclosed. The method is a sub-lithographic spacer formation and machining process to form a plurality of sub-lithographic spacers 33, 53, 83, 93 on the vertical sidewall surfaces of the features carried by the substrates 11, 71. Use a common microelectronic process comprising a. The sub-lithographic spacers 33, 53, 83, 93 have a period less than the minimum resolution [lambda] of the lithographic system. Feature density within the minimum resolution (λ) of the lithographic system, including the sub-lithographic spacers 33, 53, 83, 93, is anisotropically etched to deposit the material sequentially and selectively remove the horizontal surface of the deposited material. Can be increased. Optionally, the spacer material may be conformally deposited.
    公开号:KR20030085490A
    申请号:KR10-2003-0026662
    申请日:2003-04-28
    公开日:2003-11-05
    发明作者:안토니토마스씨
    申请人:휴렛-팩커드 디벨롭먼트 컴퍼니, 엘 피；
    IPC主号:
    专利说明:

    METHOD OF FABRICATING HIGH DENSITY SUB-LITHOGRAPHIC FEATURES ON A SUBSTRATE}
    [22] FIELD OF THE INVENTION The present invention relates to a method of fabricating high density sub-lithographic features on a substrate, and more particularly to forming a plurality of sub-lithographic spacers on a substrate. A method for fabricating high density sub-lithographic features on a substrate using microelectronic processing techniques, wherein within the minimum resolution of a lithographic system, the feature density can be more than doubled.
    [23] Standard methods for patterning features on substrates in the microelectronics industry use a photolithographic process that is readily understood. Typically, a photoresist layer is coated on the substrate material, which is subsequently exposed to a light source through a mask. The mask includes patterned features such as lines and spaces to be transferred to the photoresist. After the photoresist is exposed, the photoresist is immersed in a solvent to define the pattern transferred to the photoresist. The pattern produced by this process is typically at a line width greater than the minimum resolution (λ) of the photolithographic alignment tool, which is ultimately limited by the light wavelength of the light source used to expose the photoresist. Restricted Here, the state of the art photolithographic alignment tool can print line widths as small as about 100.0 nm.
    [24] The patterned features with photoresist are transferred to the substrate material using well known microelectronic processes such as, for example, reactive ion etching, ion milling, plasma etching or chemical etching. Using standard semiconductor process methods, gratings (ie, line-space sequences) of lines λ of width or period 2λ may be generated.
    [25] However, in many applications it is advantageous to make the line width or period as small as possible. Smaller line widths or periods result in higher performance and / or higher density circuits. Therefore, the microelectronics industry continues to seek to reduce the minimum resolution of photolithographic systems, thereby reducing the line width or period on the patterned substrate. Increasing performance and / or density can be a significant economic benefit since the electronics industry has been driven by faster and smaller electronic devices.
    [26] In FIG. 1A, a conventional method of making lines narrower than the minimum feature size [lambda] includes controlling the etching process used to pattern the substrate material. Substrate 101 includes a line 103 having a minimum feature size λ that is greater than or equal to the minimum resolution λ of the lithographic system used to pattern the line 103. Due to the minimum resolution λ of the lithographic system, lines 103 will be spaced by a space 105 that is also greater than or equal to λ. In FIG. 1A, the pattern of the line 103 and the space 105 has a period 2λ. Thus, within the period 2λ, the feature density is two, that is, one line feature 103 and one space feature 105. Similarly, within distance [lambda], the feature density is 1, i.e., either line 103 or space 105 exists within distance [lambda].
    [27] In FIG. 1B, the line 103 is controlled sideways such that the vertical sidewall S (see arrow e) of the line 103 before etching is laterally retracted to a reduced width smaller than λ (ie, <λ). Controlled lateral plasma etching reduces the width of each of them to a width smaller than λ. However, the density of line 103 is not increased by the above method. In fact, due to the side etching, the line 103 becomes narrower (ie, <λ) than λ, and the space 105 is wider than λ (ie,> λ) due to the retraction of the vertical sidewall S. As a result, the density of the features 103 and 105 in the period 2λ is still two, and the feature density in the distance λ is still one.
    [28] Similarly, in FIG. 2A, the features of substrate 107 include gratings 109 having lines 111 and spaces 113 having feature sizes greater than or equal to λ. Within the period 2λ, the number of features 111 and 113 is two, and the feature density in the distance λ is still one.
    [29] In FIG. 2B, after the controlled side plasma etching, the vertical sidewall S retreats so that the final result is that the space 113 is wider than λ (i.e.,> λ) and the line 111 is narrower than λ (ie , <λ). As before, the density of features 111 and 113 in period 2λ is still two, and the feature density in distance λ is still one.
    [30] Therefore, there is a need for a method of manufacturing sub-lithographic sized features having a narrower width than the minimum resolution of a lithographic system. There is also a need for a method of manufacturing a sub-lithographic feature that increases feature density within the minimum resolution of a lithographic system.
    [31] The method for fabricating the high density sub-lithographic features of the present invention utilizes a number of sub-plates on a substrate using common microelectronic processes, including sub-lithgraphic spacer formation and damascene processes. Solving the aforementioned problems by forming lithographic spacers The sub-lithographic spacer has a period less than the minimum resolution of the lithographic system. In microelectronic processing terminology, a spacer is a film that covers the vertical sidewalls of a feature on a substrate. The damascene processing inlaid pattern of the first material into the matrix of the second material by depositing the first material in the depression defined in the second material and subsequently removing a portion of the first material through a planarization process. It is about a technique for generating). For example, planarization processes such as chemical mechanical planarization (CMP) can be used to remove and planarize the first material.
    [32] Feature density within the minimum resolution of the lithographic system, including the sub-lithographic spacers, is increased by the method of the present invention. In addition, feature density within the minimum resolution of a lithographic system can be further increased by anisotropic etching to sequentially deposit the material and subsequently remove the horizontal surface of the deposited material. Deposition of materials may be conformal depositions where the horizontal and vertical thicknesses of the deposited material are substantially equal to each other.
    [33] Other aspects and advantages of the invention will be apparent from the following detailed description taken in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of the invention.
    [1] 1A is a cross-sectional view of a conventional substrate with line features on the substrate, with a period twice the minimum resolution of the lithographic system;
    [2] 1B is a cross-sectional view of FIG. 1A after a conventional controlled side etch processor has been used to reduce the line width;
    [3] 2A is a cross sectional view of a conventional substrate with grating, having features having a period twice the minimum resolution of the lithographic system;
    [4] FIG. 2B is a cross sectional view of FIG. 2A after a conventional controlled side etch processor has been used to reduce feature width; FIG.
    [5] 3A is a cross sectional view of photolithographic patterning of a mask layer according to the present invention;
    [6] 3B is a cross-sectional view of the mask layer of FIG. 3A after an etching process in accordance with the present invention;
    [7] 3C and 3D are cross-sectional views of a substrate comprising a feature having a minimum feature size after etching in accordance with the present invention;
    [8] 4 is a cross-sectional view of a spacer material deposited in accordance with the present invention;
    [9] 5 is a cross sectional view of a sub-lithographic spacer formed by an anisotropic etching process in accordance with the present invention;
    [10] 6 is a cross-sectional view of another deposited spacer material deposited over the sub-lithographic spacer of FIG. 5 in accordance with the present invention;
    [11] 7 is a cross sectional view of an additional sub-lithographic spacer formed by an anisotropic etching process in accordance with the present invention;
    [12] 8 and 10 are cross-sectional views of inlaid material after a deposition process in accordance with the present invention;
    [13] 9 and 11 are cross-sectional views of inlaid spacers formed by a planarization process in accordance with the present invention;
    [14] 12A and 12B are cross-sectional views illustrating the formation of features carried by a substrate in accordance with the present invention;
    [15] 13 is a cross sectional view of a spacer material deposited in accordance with the present invention;
    [16] 14 is a cross sectional view of a sub-lithographic spacer formed by an anisotropic etching process in accordance with the present invention;
    [17] 15 is a cross-sectional view of an additional sub-lithographic spacer formed by an anisotropic etching process in accordance with the present invention.
    [18] Explanation of symbols for the main parts of the drawings
    [19] 10,20: feature 14: horizontal surface
    [20] 16: vertical sidewall surface 18, 19: image
    [21] 33: spacer 105: space
    [34] In the following description and in the drawings, like elements are identified by like reference numerals.
    [35] As shown in the drawings for illustrative purposes, the present invention is embodied in a method of manufacturing a high density sub-lithographic feature. The method includes depositing a mask layer on a substrate and then patterning the mask layer to define an image comprising a minimum feature size that is greater than or equal to the minimum resolution of the lithographic system used to pattern the mask layer. do. This mask layer is etched to transfer an image onto the substrate to define the features on the substrate. This feature includes a minimum feature size and also includes horizontal and vertical sidewall surfaces.
    [36] The spacer material is deposited on the feature such that the spacer material covers the horizontal surface and the vertical sidewall surface. This deposition continues until the spacer material has a predetermined thickness that is less than the minimum feature size.
    [37] Feature density within the minimum feature size is increased by anisotropically etching the spacer material to selectively remove the spacer material from the horizontal surface. As a result, the spacer material remains on the vertical sidewall surface and defines a number of sub-lithographic spacers that contact the vertical sidewall surface and extend horizontally outward of the vertical sidewall surface. The sub-lithographic spacer includes a thickness less than the minimum feature size. Thus, feature density within the minimum feature size is greater than 2.0. This density includes features and sub-lithographic spacers.
    [38] Optionally, the feature density within the minimum feature size can be further increased by repeating the deposition and anisotropic etching steps mentioned above to define additional sub-lithographic spacers on the previously defined sub-lithographic spacers. The additional sub-lithographic spacer also includes a thickness less than the minimum feature size.
    [39] In FIG. 3A, a mask layer 17 is deposited on the surface 12 of the substrate 11. This mask layer 17 may be a photoresist material layer, for example. Mask layer 17 is patterned to define an image in mask layer 17 that includes a minimum feature size λ. The minimum feature size λ is greater than or equal to the minimum resolution of the lithographic system used to pattern the mask layer 17. For example, a lithographic system may be a conventional photolithographic system, and the minimum resolution may be determined by the wavelength of the light source involved in the photolithographic system and used to project an image on the mask layer 17. .
    [40] Referring again to FIG. 3A, the mask 21 involves features 23 and 25 having a minimum feature size λ that is greater than or equal to the minimum resolution of the lithographic system. Mask 21 is illuminated by a light source (not shown) and a portion of that light 43 is blocked by an opaque feature 23 and another portion of that light 41 passes through the transparent feature 25. And expose mask layer 17.
    [41] In FIG. 3B, a portion of the mask layer 17 that is exposed to light 41 is left after the mask layer 17 is etched, and the portion that is not exposed to light after the mask layer 17 is etched is removed. . After etching, images 18 and 19 are defined in mask layer 17. These images 18, 19 also include a minimum feature size λ. For example, images 18 and 19 can be defined by placing a portion of mask layer 17 that is not exposed to light 41 in a dissolving solvent. As a result, the dissolved portion forms an image 18 and the undissolved portion forms an image 19.
    [42] In FIG. 3C, image 19 covers a portion of surface 12 of substrate 11, while image 18 coincides with surface 12. Images 18, 19 are then transferred to substrate 11 by etching the substrate to define features 10, 20. Features 10 and 20 include a minimum feature size λ. Feature 20 is a trench with vertical sidewall surface 16 and horizontal surface 14, while feature 10 is also a line with vertical sidewall surface 16 and horizontal surface 12. Since features 10 and 20 include a minimum feature size λ, the minimum period between repetitions of the features is 2λ.
    [43] Thus, in FIG. 3D, within the distance λ, there is a feature density corresponding to one (ie 1.0), ie a single feature 10 or a single feature 20. On the other hand, within period 2λ, there is a feature density, i.e., feature 10 and feature 20, corresponding to (i.e. 2.0).
    [44] In FIG. 4, spacer material 31 is deposited on horizontal surfaces 12, 14 and vertical sidewall surfaces 16. Deposition of the spacer material 31 continues until the spacer material 31 has a predetermined thickness t H , t V less than the minimum feature size λ. That is, the thickness t H of the spacer material 31 on the horizontal surface 12, 14 is less than λ (t H <λ), and the thickness t V of the spacer material on the vertical sidewall surface 16 is less than λ. Small (t V <lambda). For example, in a photolithographic process of minimum feature size [lambda], the horizontal and vertical sidewall thicknesses (t H , t V ) are typically in the range of about 0.1 lambda to about 0.5 lambda. The thicknesses t H , t V need not be identical to one another (ie t H ≠ t V ).
    [45] As described below for all embodiments described herein, the spacer material (including the spacer material 31) and the inlaid spacers have horizontal and vertical sidewall thicknesses (t H , t V ). May be conformally deposited such that are substantially the same (see FIGS. 4-7 and 13-15). That is, t H = t V. In addition, sequential deposition that increases the feature density within the minimum feature size λ may also be conformal deposition. In addition, the deposition of the spacer material may be a combination of non-conformal deposition with t H ≠ t V and conformal deposition with t H = t V.
    [46] Techniques for depositing spacer material 31 include, but are not limited to, chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), sputtering, plating and atomic layer deposition (ALD).
    [47] In FIG. 5, the feature density within the minimum feature size λ is increased by anisotropically etching the spacer material 31 to selectively remove the spacer material 31 from the horizontal surfaces 12, 14. However, the spacer material 31 defines a number of sub-lithographic spacers 33 that remain on the vertical sidewall surface 16 and are in contact with and extend outward from the vertical sidewall surface 16. The sub-lithographic spacers 33 are sub-lithographic because their thickness t V is less than the minimum feature size λ (ie t V <λ).
    [48] After anisotropic etching, the feature density within the minimum feature size λ is three, i.e. there are two sub-lithographic spacers 33 and one feature 24 (i.e., feature 24 has spacers 33). Space, see reference number S in FIG. 5). Thus, the feature density within the minimum feature size λ is greater than 2.0. Similarly, the feature density in period 2λ is 4, i.e. there are two sub-lithographic spacers 33, one feature 24 and one feature 10 (reference numeral D in FIG. 5). )). Therefore, the feature density in the period 2λ is greater than 3.0.
    [49] The sub-lithographic spacer 33 has a vertical sidewall surface 22. The distance λ S between the vertical sidewall surfaces 22 of the feature 24 is less than the minimum feature size λ (λ S <λ). Further, the distance λ P between the vertical sidewall surfaces 22 in the feature 24 is less than the minimum feature size λ (λ P <λ). As a result, as described below, the inlaid spacer can selectively fill the distance λ S and will also have a sub-lithographic size smaller than the minimum feature size λ.
    [50] 6, further increasing the feature density within the minimum feature size [lambda] by repeating the deposition and anisotropic etching steps as described above may optionally be required. Spacer material 51 is deposited on horizontal surfaces 12, 14 and vertical sidewall surfaces 22 of previously formed sub-lithographic spacers 33 to completely fill feature 24. This deposition continues until the spacer material 51 has a predetermined thickness t H , t V less than the minimum feature size λ.
    [51] In FIG. 7, the feature density within the minimum feature size λ can be further increased by anisotropically etching the spacer material 51 to selectively remove the spacer material 51 from the horizontal surfaces 12, 14. However, the spacer material 51 defines a number of sub-lithographic spacers 53 that remain on the vertical sidewall surface 22 and are in contact with and extend outward from the vertical sidewall surface 22. The sub-lithographic spacers 53 are sub-lithographic because their thickness t V is smaller than the minimum feature size λ (t V <λ).
    [52] After anisotropic etching, the feature density within the minimum feature size λ is 5, that is, there are four sub-lithographic spacers 33 and 53 and one feature 26 (see reference numeral S in FIG. 7). ). Therefore, the feature density within the minimum feature size λ is greater than 4.0. Similarly, the feature density in the period 2λ is 6, i.e. there are four sub-lithographic spacers 33,53, one feature 26 and one feature 10 (reference numeral in FIG. 7). (D)). Thus, the feature density in the period 2λ is greater than 5.0.
    [53] The sub-lithographic spacer 53 has a vertical sidewall surface 44. The distance λ S between the vertical sidewall surfaces 44 of the feature 26 is less than the minimum feature size λ (λ S <λ). Further, the distance λ P between the vertical sidewall surfaces 44 in the feature 26 is less than the minimum feature size λ (λ P <λ). As a result, as described below, the inlaid spacer can selectively fill the distance λ S , and the inlaid spacer will also have a sub-lithographic size smaller than the minimum feature size λ.
    [54] After the anisotropic etching step, the substrate 11 may be planarized along one plane (see dashed line p in FIGS. 4 and 6) to form a substantially planarized surface. For example, a process such as chemical mechanical planarization (CMP) can be used to planarize the substrate 11.
    [55] 8 and 10, after completion of the anisotropic etching step, inlaid material 37, 67 may be deposited on the substrate 11. Inlaid material 37, 67 completely covers horizontal surfaces 12, 14, features 10, 20, and spaces between the vertical sidewall surfaces 22, 44 of sub-lithographic spacers 33, 53. Fill any depressed regions in the substrate as defined by it.
    [56] 9 and 11, the substrate 11 is planarized to form a substantially planarized surface and define inlaid spacers 39 and 69 (see dashed line P). For example, a process such as CMP can be used to planarize the substrate 11.
    [57] 9 and 11, inlaid spaces 39 and 69 are formed between the vertical sidewall surfaces 22 and 44 of the sub-lithographic spacers 33 and 53. The distance λ S between these vertical sidewall surfaces 22, 24 is less than the minimum feature size λ. Thus, inlaid spacers 39 and 69 are also sub-lithographic because they have a thickness equal to the distance λ S less than the minimum feature size λ.
    [58] In FIG. 9, when there are two sub-lithographic spacers 33 and inlaid spacers 39, the feature density within the minimum feature size λ is greater than 2.0.
    [59] In FIG. 11, when there are two sub-lithographic spacers 33, two sub-lithographic 53, and inlaid spacers 69, the feature density within the minimum feature size λ is greater than 4.0. .
    [60] In FIG. 9, when there are two sub-lithographic spacers 33, inlaid spacer 39, and feature 10, the feature density in period 2λ is greater than 3.0.
    [61] In FIG. 11, if there are two sub-lithographic spacers 33, two sub-lithographic spacers 53, inlaid spacer 39, and feature 10, within the minimum feature size λ Feature density is greater than 5.0.
    [62] In another embodiment of the present invention, as illustrated in FIG. 12A, feature layer 80 is deposited on surface 82 of substrate 71. Using a photoresist and photolithography process as described above, a photoresist layer is deposited on feature layer 80 and exposed with an image, which image pattern 91 on feature layer 80. It is dissolved by etching to form.
    [63] In FIG. 12B, feature layer 80 is etched to define features 81, 85 that include horizontal surfaces 82, 84 and vertical sidewall surfaces 86. Features 81 and 85 include a minimum feature size λ that is greater than or equal to the minimum resolution of the lithographic system used to pattern feature layer 80.
    [64] In FIG. 13, spacer material 87 is deposited on the horizontal surfaces 82, 84, vertical sidewall surfaces 86 of features 81, 85. This deposition continues until the spacer material 87 has a thickness t H , t V less than the minimum feature size λ.
    [65] In FIG. 14, the feature density within the minimum feature size λ can be increased by anisotropically etching the spacer material 87 to selectively remove the spacer material 87 from the horizontal surfaces 82, 84. However, the spacer material 87 defines a number of sub-lithographic spacers 83 that remain on the vertical sidewall surface 86 and contact the vertical sidewall surface 86. The spacers 83 are sub-lithographic because their thickness t V is less than the minimum feature size λ (t V <λ).
    [66] After the anisotropic etching, the feature density within the minimum feature size λ is 3, ie there are two sub-lithographic spacers 83 and one feature 85. Therefore, the feature density within the minimum feature size λ is greater than 2.0. Similarly, the feature density in the period 2λ is four, that is, there are two sub-lithographic spacers 83, one feature 85 and one feature 81. Thus, the feature density in the period 2λ is greater than 3.0.
    [67] Sub-lithographic spacers 83 have vertical sidewall surfaces 94. The distance λ S between the vertical sidewall surfaces 94 of the feature 85 is less than the minimum feature size λ (λ S <λ). Also, the distance λ P between the vertical sidewall surfaces 94 in the feature 85 is less than the minimum feature size λ (λ P <λ). As a result, as described above, the inlaid spacer (not shown) may optionally fill the distance λ S , and will also have a sub-lithographic size smaller than the minimum feature size λ.
    [68] Optionally, the feature density within the minimum feature size λ can be further increased by repeating the deposition and anisotropic etch steps as described above with reference to FIGS. 6 and 7. For example, another layer of spacer material (not shown) is deposited on the horizontal surfaces 82, 84 and vertical sidewall surfaces 94 of the previously formed sub-lithographic spacers 83. This deposition continues until the spacer material has a predetermined thickness t H , t V less than the minimum feature size λ.
    [69] In FIG. 15, after the anisotropic etching step, a number of sub-lithographic spacers 93 are defined on the vertical sidewall surface 94 of the previously formed sub-lithographic spacers 83. Sub-lithographic spacers 93 are sub-lithographic, because their thickness t V is less than the minimum feature size λ (t V < λ).
    [70] Also, the feature density within the minimum feature size λ is 5, ie, FIG. 15 where four sub-lithographic spacers 83,93 and one feature 92 (reference numeral 92 is the space between the spacers 93). Exist). Therefore, the feature density within the minimum feature size λ is greater than 4.0. Similarly, the feature density in period 2λ is 6, i.e. there are four sub-lithographic spacers 83,93, one feature 92 and one feature 81. Therefore, the feature density in the period 2λ is greater than 5.0.
    [71] As described above, inlaid material (not shown) may be deposited and planarized to form an inlaid spacer (not shown) that fills feature 92. The inlaid spacers increase the density within the minimum feature size λ and the density within the period 2λ as described above.
    [72] Materials for inlaid spacers 39, 69 and sub-lithographic spacers 33, 53, 83, 93 include, but are not limited to, metals, electrically conductive materials, semiconductor materials, silicon (Si), dielectric materials, and optical materials. It is not limited. The silicon may be polysilicon (α-Si). The metal may be a material including aluminum (Al), tungsten (W), tantalum (Ta), and copper (Cu), but is not limited thereto.
    [73] Materials for substrates 11 and 71 and feature layer 80 include, but are not limited to, metals, electrically conductive materials, semiconductor materials, silicon (Si), dielectric materials, glass, and optical materials. The silicon may be single crystal silicon (Si) or polysilicon (α-Si). The metal may be a material including aluminum (Al), tungsten (W), tantalum (Ta), and copper (Cu), but is not limited thereto.
    [74] Optionally, one or more features, including sub-lithographic spacers, remove material along its horizontal surface such that there is a height change between the feature and the sub-lithographic spacers for the high density sub-lithographic features of the present invention. Use a nano imprint stamp that is etched. This height change can be transferred to the substrate accompanying the imprint layer by pressing the nano imprint stamp onto the imprint layer.
    [75] For the high density sub-lithographic features of the present invention, optical components are also used. For example, the optical component may be an optical grating, a polarizing filter or a neutral density filter. Substrate 11, 71, spacer, inlaid spacer, and feature layer 80 may be an optical material having a band gap high enough to be optically transmissive.
    [76] For example, the substrate may be made from a material comprising optically transmissive glass, but is not limited thereto, and the spacer or inlaid spacer may be magnesium oxide (MgO), silicon oxide (SiO 2 ), tantalum oxide (Ta). 2 O 5 ), calcium fluoride (CaF 2 ) and magnesium fluoride (MgF 2 ), but are not limited thereto.
    [77] Deposition of materials for spacers and inlaid spacers can be accomplished using processes including, but not limited to, chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), sputtering, plating, and atomic layer deposition (ALD). It is not limited.
    [78] Anisotropic etching steps can be accomplished using techniques including, but not limited to, reactive ion etching, ion milling, chemical etching, and plasma etching.
    [79] While some embodiments of the invention have been described and illustrated, the invention is not limited to the specific forms or arrangements described and illustrated herein. The invention is limited only by the claims.
    [80] According to the present invention, there is provided a method of manufacturing a sub-lithographic feature having a width narrower than the minimum resolution of a lithographic system and a method of manufacturing a sub-lithographic feature of increasing the feature density within the minimum resolution of the lithographic system. This is provided.
    权利要求:
    Claims (20)
    [1" claim-type="Currently amended] A method of making a high density sub-lithographic feature,
    Depositing a mask layer 17 on the substrate 11,
    Patterning the mask layer 17 to define an image 18, 19 comprising a minimum feature size λ greater than or equal to the minimum resolution of the lithographic system used for patterning. To do that,
    Features the substrate 11 is etched to deliver the images 18, 19 to the substrate 11 and includes thereon the minimum feature size λ, horizontal surface 14 and vertical sidewall surface 16. Defining (10,20),
    The spacer material (3) on the horizontal and vertical sidewall surfaces (14, 16) until a spacer material (31) has a predetermined thickness (t H , t V ) less than the minimum feature size (λ). 31),
    A plurality of sub-lithsographic spacers, wherein the spacer material 31 remains on the vertical sidewall surface 16 and includes a thickness t V thereon that is less than the minimum feature size λ. Increasing the feature density in the minimum feature size λ by anisotropically etching the spacer material 31 to selectively remove the spacer material 31 from the horizontal surface 14 to define (33); ,
    The deposition and the to define an additional sub-lithographic spacer 53 comprising a thickness t H , t V less than the minimum feature size λ on the previously defined sub-lithographic spacer 33. Optionally further increasing feature density within said minimum feature size λ by repeating anisotropic etching.
    A method of making a high density sub-lithographic feature.
    [2" claim-type="Currently amended] The method of claim 1,
    The sub-lithographic spacers 33 and 53 are made of a material selected from the group consisting of metals, electrically conductive materials, semiconductor materials, silicon and dielectric materials.
    A method of making a high density sub-lithographic feature.
    [3" claim-type="Currently amended] The method of claim 1,
    The substrate 11 is made of a material selected from the group consisting of metals, electrically conductive materials, semiconductor materials, silicon, dielectric materials and glass.
    A method of making a high density sub-lithographic feature.
    [4" claim-type="Currently amended] The method of claim 1,
    The feature density within the minimum feature size λ is greater than 2.0
    A method of making a high density sub-lithographic feature.
    [5" claim-type="Currently amended] The method of claim 1,
    The feature density within twice the minimum feature size λ is greater than 3.0
    A method of making a high density sub-lithographic feature.
    [6" claim-type="Currently amended] The method of claim 1,
    After completion of the anisotropic etching step, an inlaid material that completely covers the features 12, 14, the sub-lithographic spacers 33, 53 and fills any depressed regions on the substrate 11. (inlaid material) 37,67;
    Planarizing the substrate 11 to form a substantially planarized surface p and define inlaid spacers 39, 69.
    A method of making a high density sub-lithographic feature, further comprising.
    [7" claim-type="Currently amended] The method of claim 6,
    The planarization step includes a chemical mechanical planarization step
    A method of making a high density sub-lithographic feature.
    [8" claim-type="Currently amended] The method of claim 6,
    The inlaid spacers 39 and 69 are made of a material selected from the group consisting of metals, electrically conductive materials, semiconductor materials, silicon, and dielectric materials.
    A method of making a high density sub-lithographic feature.
    [9" claim-type="Currently amended] The method of claim 6,
    The feature density within the minimum feature size λ is greater than 3.0
    A method of making a high density sub-lithographic feature.
    [10" claim-type="Currently amended] The method of claim 6,
    The feature density within twice the minimum feature size λ is greater than 4.0
    A method of making a high density sub-lithographic feature.
    [11" claim-type="Currently amended] The method of claim 6,
    The inlaid spacers 39 and 69 have a thickness λ S less than the minimum feature size λ.
    A method of making a high density sub-lithographic feature.
    [12" claim-type="Currently amended] A method of making a high density sub-lithographic feature,
    Depositing a feature layer 80 on the surface 82 of the substrate 71;
    The feature to define a feature 81, 83 comprising a horizontal surface 82, 84, a vertical sidewall surface 86, and a minimum feature size λ that is greater than or equal to the minimum resolution of the lithographic system used for patterning. Patterning and etching layer 80,
    The spacer material (on the horizontal surface 82, 84 and the vertical sidewall surface 86) until the spacer material 87 has a predetermined thickness t H , t V smaller than the minimum feature size λ. 87),
    The spacer material 87 remains on the vertical sidewall surface 86 and defines a plurality of sub-lithographic spacers 83 including a thickness t V below the minimum feature size λ thereon. Increasing the feature density in the minimum feature size λ by anisotropically etching the spacer material 87 to selectively remove the spacer material 87 from the horizontal surfaces 82, 84;
    The deposition and the to define an additional sub-lithographic spacer 93 comprising a thickness t H , t V less than the minimum feature size λ on the previously defined sub-lithographic spacer 83. Optionally further increasing feature density within said minimum feature size λ by repeating anisotropic etching.
    A method of making a high density sub-lithographic feature.
    [13" claim-type="Currently amended] The method of claim 12,
    The sub-lithographic spacers 83 and 93 are made of a material selected from the group consisting of metals, electrically conductive materials, semiconductor materials, silicon and dielectric materials.
    A method of making a high density sub-lithographic feature.
    [14" claim-type="Currently amended] The method of claim 12,
    The substrate 71 is made of a material selected from the group consisting of metals, electrically conductive materials, semiconductor materials, silicon, dielectric materials and glass.
    A method of making a high density sub-lithographic feature.
    [15" claim-type="Currently amended] The method of claim 12,
    The feature density within the minimum feature size λ is greater than 2.0
    A method of making a high density sub-lithographic feature.
    [16" claim-type="Currently amended] The method of claim 12,
    The feature density within twice the minimum feature size λ is greater than 3.0
    A method of making a high density sub-lithographic feature.
    [17" claim-type="Currently amended] The method of claim 12,
    The feature layer 80 is a material selected from the group consisting of metals, electrically conductive materials, semiconductor materials, silicon, dielectric materials, and glass.
    A method of making a high density sub-lithographic feature.
    [18" claim-type="Currently amended] The method of claim 12,
    After completion of the anisotropic etching step, deposition of inlaid material 37, 67 completely covering the feature 92, the sub-lithographic spacers 83, 93, and any recessed areas on the substrate 71. To do that,
    Planarize the inlaid material 37, 67, the feature 92 and the sub-lithographic spacers 83, 93 to form a substantially planarized surface p and define inlaid spacers 39, 69. Steps to
    A method of making a high density sub-lithographic feature, further comprising.
    [19" claim-type="Currently amended] The method of claim 18,
    The planarization step includes a chemical mechanical planarization step
    A method of making a high density sub-lithographic feature.
    [20" claim-type="Currently amended] The method of claim 18,
    The inlaid spacers 39 and 69 are made of a material selected from the group consisting of metals, electrically conductive materials, semiconductor materials, silicon, and dielectric materials.
    A method of making a high density sub-lithographic feature.
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    同族专利:
    公开号 | 公开日
    EP1359613A2|2003-11-05|
    JP2003324066A|2003-11-14|
    CN1455440A|2003-11-12|
    EP1359613A3|2005-01-19|
    TW200305784A|2003-11-01|
    KR100954349B1|2010-04-21|
    US20030203636A1|2003-10-30|
    US6713396B2|2004-03-30|
    JP4368605B2|2009-11-18|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    2002-04-29|Priority to US10/135,900
    2002-04-29|Priority to US10/135,900
    2003-04-28|Application filed by 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘 피
    2003-11-05|Publication of KR20030085490A
    2010-04-21|Application granted
    2010-04-21|Publication of KR100954349B1
    优先权:
    申请号 | 申请日 | 专利标题
    US10/135,900|US6713396B2|2002-04-29|2002-04-29|Method of fabricating high density sub-lithographic features on a substrate|
    US10/135,900|2002-04-29|
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